Winner at the 2019 Engineering PhD Summit on Intelligent Systems 

Saptadeep Pal, University of California Los Angeles, USA

“Waferscale Architectures for Intelligent Systems”

At the heart of most modern intelligent systems lies highly parallel compute intensive applications such as deep neural networks, graph processing etc. With explosion of data, intelligent systems of the future will need to perform orders of magnitude more computation than that’s required to run today’s largest workloads. For example, language models would need to be 500x larger and would require 1000x larger datasets to train in order to achieve beyond human-level accuracy. This requires high throughput and highly energy efficient computing, and therefore, the need for massively parallel hardware has never been stronger. To build massively parallel processor systems, we have developed a large waferscale integration technique (silicon interconnect fabric, Si-IF), where a large number of bare dies, both compute and memory, can be integrated tightly using very high bandwidth, low latency and highly energy efficient interconnects.
In this talk, I will discuss the challenges of architecting a waferscale system. Using a waferscale GPU case study, I will show that a 40x larger GPU can be built on a wafer compared to today’s largest GPU and discuss in details the various optimizations that need to be done across the stack, from circuits to runtime systems in order to fully exploit the potential of the waferscale integration. Compared to a multiple GPU system interconnected using conventional Back to top Back to top
integration schemes, a waferscale GPU can provide on an average 5.2x performance speedup across a suite of applications. Next, I will discuss waferscale graph processing. Graph applications require very large random-access bandwidth and therefore, we are developing a waferscale graph processor architecture and a prototype hardware to get large gains in performance by leveraging the large interconnect bandwidth on the wafer while providing a simple programming model. Such an architecture is estimated to improve graph processing performance by up to about 22x compared to conventional systems.

View Saptadeep’s winning presentation:

Winner of the best EPFL Poster  

Mehmet Mutlu, Biorobotics laboratory

« Roombots – self-reconfigurable modular robot »

The Roombots project is a self-reconfigurable modular robot (SRMR) made in the Biorobotics Laboratory. SRMRs have various advantages over traditional fixed morphology robots that can be summarized in three main points: Versatility, robustness and low cost. The most prominent capability is the shape changing. A SRMR ideally can create any arbitrary shape. Thus, they can adapt to changing demands in time. Having standardized building modules is also preferred for manufacturing reasons. Because mass manufacturing a single type of building block is expected to be cheaper and faster than custom designing dozens of task specific robots. Moreover, replacing a broken module is much easier than detecting and repairing a problem in a big system. SRMRs can in principle self-repair through detecting broken modules and replacing them autonomously.
SRMRs can be considered as the “Swiss Army knife” of robotics. Because, a generic module can collaborate with other modules to perform many different tasks, ideally almost everything. We envision Roombots being used to create intelligent environments (house or work) to enable new functionalities. For example in a futuristic scenario, Roombots create make a bed to sleep on. In the morning, they can self reconfigure into a table and chairs for the breakfast, then into a sofa for the rest of the day. Modules can attach to existing furniture, move around the house and manipulate objects. SRMRs can be particularly useful for elderly or handicapped people.